An Update on Moore's Law-3


DR. GORDON MOORE: They can even do brain surgery there. If we forget our connection, they can go in and connect it back up if necessary. Not on a production basis, though.

(Laughter.)

DR. GORDON MOORE: Making things flat has changed things a lot. A couple of generations of processes ago, we just started using the polishing. Here you see a structure where the top couple of layers are flat but the things underneath show the contours are built up naturally.

If you try to make a five-layer metal structure without the polishing, it gets such ridiculous topography that the lithography doesn't work anymore; nothing works very well.

There are other challenges we're having to face, also, with these technologies, and these relate to the rate of change that we go through in the industry. We have to ramp up a processor extremely rapidly and then ramp it down at least equally fast.

This shows several generations of the Pentium processor. Remember on that slide where I showed the four dies for the Pentium processor, each one getting smaller as we went through the generations, here the four colors show the four generations. The very first one is the 60 and 66 MHz Pentium processor that came off the .8 micron technology. Never went to very high volume.

The .6 micron technology grew fairly rapidly, building devices up to 120 MHz. The .35 micron generation, the generation that's out there now, was up over 200 MHz, and then the quarter micron generation is going on.

Each one of these requires extensive retooling of the factories, and you see a given technology is only around for a couple of years producing a particular product.

This is a significant challenge to the factories in itself, but when you combine it with the fact that the changes go on within the family, it gets considerably more complex. For example, the yellow here is -- I guess I can call it classic Pentium processor. The Pentium processor with MMX technology which has been growing very, very rapidly since its introduction really the beginning of this year, was happening in the last year, has really replaced it completely on this time scale. So you have not only the changes in process generation but the changes in the product occurring at really an accelerated pace. It really keeps our factories busy.

It certainly changed a lot since the early days. This is a picture of Intel 's manufacturing in about 1970. That was a time when we felt whatever happened below the level of the bench didn't make much difference on cleanliness, so many smocks were de rigeur in the lab, often with peace symbol embroidered on them and one thing or another.

(Laughter.)

DR. GORDON MOORE: That has changed quite a bit. If we look at the modern day fab, and this is actually the one in Santa Clara, people are essentially completely in space suits. The material moves around either in guided vehicles or on a monorail system from one generation to the other, is all automatically handled. People don't use tweezers and move wafers anymore. And all the equipment, picking the dies and doing the assembly, the degree of automation and cleanliness has really changed dramatically.

We've learned a lot about how to clean things up, which is absolutely necessary in order to be able to make today's products.

We've gone through a couple of different ways to try to improve yields, for example. One thing we did, we used to use the American judicial system for defects. Everything was innocent until proven guilty. We had to find a defect, identify it with a particular cause before we cleaned that up. We had so many things to work on that we could be very selective and only work on those where we knew it would have an impact so we did a lot of analysis before we made the changes in manufacturing.

When the Japanese manufacturers got into this business heavily in the 1980s, they took exactly the opposite approach. Any deviation from perfection was bad. So without worrying so much about which things were actually causing them problems, they cleaned up all the chemicals, cleaned up the environmental, cleaned up the piping to move the gas around, did everything on a broad scale. I liken these to the difference between targeted bomb accompanying carpet bombing for getting rid of defects.

Now I think we both moved -- certainly we have moved to a combination of the two. We clean up everything as well as we can; in addition, use techniques like this focused ion beam microscope and milling to find the residual defects, relate those to the particular parts of the process where they're introduced and go back and work especially hard on them. Defects have gotten down to such a low level now, finding out what they are and where they come from is increasingly challenging. The analytical tools required are a real alphabet soup. It's really been an amazing additional capability necessary to help us clean things up.

Wafers have changed in size during this time period, too. The first planar transistor I showed you was made on about a half-inch wafer. These wafers are shown really to scale. In fact, one of my first technical contributions in the semiconductor industry was to prove if you went above three-quarters of an inch diameter wafer, the materials went {} and materials were imperfect. Things have changed quite a bit since then and I admit having been skeptical about a lot of changes in wafer size. These are expensive and difficult to do, and it's not always obvious that you're going to get the benefits that the larger area gives.

But now the industry is very heavily in eight-inch wafers, and 12-inch wafers or more correctly 300 millimeter wafers look like they'll be here about the end of the decade. For some very good reasons. And we'll talk about those in a second.

But looking forward, we still have a lot of challenges and a lot of headroom with the technology. I've listed here some of the challenges that I think we have to contend with. Managing complexity is of extreme importance. Design of a modern microprocessor, at least at Intel, typically takes place at several locations separated quite widely geographically. We can no longer get all the engineers to work on a project at one place, connected with an extensive computer network and a lot of tools.

Managing that, to be sure that the product that comes out the end is what we started to do takes a lot of attention and sophistication. Similarly, being sure what you design is what you wanted to make, functional validation, is a big job. In fact, we have about as many people doing that as we did the actual design on a new processor. And even then, occasionally something slips through, like some of you may remember the Pentium processor floating point problem of a couple of Christmases ago. So something like that, however, does allow us to improve our validation techniques rather considerably.

The rest of these I want to talk about a little bit more in detail. Interconnections are starting to be a limiter, power which I thought at one time would solve the CMOS is rearing its ugly head, cost is always a consideration. The basic technology that let's us make things smaller, the lithography, requires a good deal of the state of improved we've been on. {}

Let's look first at the he delay trends. Up until now, the delays have been principally determined by the transistors. The interconnection has tended to be slower. I know we've taken kind of an average of interconnects of a couple millimeters long. They continue to get faster as we go to smaller connections, but the delays, because of the increased resistance in capacitance associated with the interconnectors, starts to slow down.

Right now, moving from .35 micron to .25 micron, at least with the example I 've chosen, we go from the point where the transistor delay dominates to the point where the interconnection delay dominates. And as we look further down the road, increasingly, interconnections are going to be dominating the performance.

This requires that we look at things to decrease the resistance and the capacitance insofar as we can. You've seen copper mentioned rather extensively in the newspapers recently as a substitute for aluminum interconnections. Copper is a little bit better as a conductor. It has 50 percent higher conductivity if you can get the bulk properties on top of it but it's not factor of two orders of magnitude.

Similarly, we have demonstrated insulators that have a diametric constant of .02. They're mostly air, kind of a gel structure. You can make those in bulk. It's not clear yet we can put them on devices. Some organic films are a little lower, but we'll be fighting conductivity and dielectric constants very strongly over the next few years.

Moving on to power. I have here a simple example of power scaling. I want to consider two microprocessors made on different generations of technology. And this would be on two different generations. Skip one. The sort of six-year apart, nominally. Consider it would be the .35 micron technology and the .18 micron technology for example. And see what happens to the power of the device as we move from one of those to the other.

First of all, we would improve the frequency significantly. I picked a factor of five here. Maybe from 200 MHz to a gigahertz. That's the kind of thing you'd be looking at moving from .35 to .15. The scaling factor going through two generations, .7 squared is about .5; .49, I guess to be more precise.

And as we saw in the early slide when I showed the various families of microprocessors, as we move down to the lead processor on each generation, it tends to be bigger than the chip was previously. So I'm saying over two generations of technology like this, the leading processor might double the area.

So then we can look at what happens with the power. The power is the frequency, proportional to the capacitance which is one over the scaling factor squared in capacitance per unit area times the area times V squared. Or if you looked at these two processors, then, the power of the new one over the power of the original one, and just plugged in the numbers, {} you see for the same voltage, you would have 40 times the power. The ten watt processor on the .35 micron generation of technology would be a 400 watt processor on the new generation if nothing else was changed.

Getting 10 watts out of a package is fun enough. Trying to get 400 watts out of one is something we don't know much at all.

Obviously the one variable we have control over there is the voltage. So if we scaled the voltage in order to maintain the power the same in these two generations it turns out to be by the square root of 40 or 3.3 volt processors today would have to be the half volt processor a couple generations down the road.

Operating at half a volt isn't much fun either. Trying to maintain a few percent accuracy in your power distribution when you're moving subsequent amps or so around is really a challenge. So power is something we're going to have to spend a lot of time and energy on over the next several generations, and we're going to keep on the curve we've been on and still allow the products to be used easily in systems.

I said cost is important. This has become a very capital intensive industry. This is a change. When Intel was founded, on the first $3 million we set up our development and our manufacturing facilities, all the equipment in them, developed our first products and processes. Now $3 million doesn't buy you a single tool that goes into the fab.

Over the last few years in particular, the cost has gone up by leaps and bounds. I remember anticipating a billion dollar fab and thinking that was something we could never afford, but if you look at these curves here, this is a capital cost for 5,000 wafer starts per week. We consider this a very small facility, and typically we'd build one twice that large.

So if you look at the quarter micron technology, you see it's about 1.2, 1.3 billion dollars per 5,000 wafers. If you wanted 10,000 wafer factory, you're between two and two and a half billion dollars in capital investment.

As we move to the next generation of technology, it moves up a fair amount from .25 to .18 because controlling the smaller dimensions require exactness of state of the art. But at the same time, if we move to 300 millimeter wafers, a very likely thing to happen, we get up to something like $2 billion for 5,000 wafers per week. Or if we still want 10,000 wafer facilities, our plants get up in the $4 billion range.

Amazing to me, the industry has been able to swallow these huge increases in capital. We can get considerably more output as we move from one to the other also, so all is not completely wasted, certainly. But it is an increasing challenge as we move up the curve.

I mentioned lithography is a challenge. If we want to stay on this road map, continuing with smaller and smaller dimensions, requires a tremendous amount of work because now we're in a range that's below the optical wavelength, and increasingly is below the wavelength of the ultraviolet light we can get as well.

We can make laboratory samples of very small features. This shows .15 micron lines with .15 micron spaces in what we used to call a thin film, even though the film is several times as thick as the features we're putting in it. But the tools don't exist to do this over a large area or on a production basis yet. We think they will come along by the time we need them, which is for the generation beyond .18 microns.

In fact, if we look at lithography alternatives, we've been able to use ultraviolet light down to the .25 generation in production. By pushing the techniques as hard as we can, actually writing features that are smaller than wavelength, we should be able to push to the .18 microns and moving into production in a couple of years. Below that, life gets a lot more difficult, and that's where we're looking at really the industry, looking at x-rays, some special E-beam writing techniques, each of which is making structures using a very short wavelength but which have a variety of other problems. Or IE investment for extreme ultraviolet which lets you use mirrors, multiple layer dielectric mirrors. {} Maybe we can extend a lot of ideas of optical lithography for a couple more generations.

Any one of these three technologies, if it can work potentially has the ability to take us down really about as far as we want to go.

We've gone as far as we want to go but maybe not as far as nature will let us go because there are real limits. This is an electron micrograph through one of the quarter micron transistors. The bottom here is the single crystal silicon, and if this picture shows up well, should be able to see the individual molecules, which shows up nicely in the original. We tend to lose a little bit of resolution here.

The top layer is the polycrystalline silicon which makes up the gate. The gray area in the middle here is the gate dielectric.

As you can see, it's only several molecular layers thick. I don't know how much more you can expect to scale that without beginning to see some real problem. So at some time in the next several generations, we really start to get to some fundamental limits. But not before we've gone through probably five more generations of technology.

This will carry us quite a long way, and it will have some very important impacts on what we can do with microprocessors. We can expect to see the performance of our processors double every 18 to 24 months for at least several years.

If you extrapolate all those curves together, I think Jerry Parker, who runs our technology and manufacturing operation, says we run out of gas doing that in the year 2017. That's well beyond my shift.

(Laughter.)

DR. GORDON MOORE: We can expect to see product life cycles continue to be short and probably even get shorter. And as I indicated, we can expect to take advantage of this integration by more and more functionality moving onto the chip. Because that's the only way we can take full advantage of the hardware technology which has taken us so far in reducing the cost and improving the performance of electronic systems.

So I think understanding where the technology naturally drives us is extremely important, and being sure, collectively, we take the most advantage of it will let us move the electronics industry along the fastest.

This Developer's Forum is really the mechanism we want to use to keep you abreast of where we think the technology is going, and, hopefully, make it as useful as possible so that you can take advantage of what this violation of Murphy's Law has allowed us to do.

So I hope you find this one rewarding and we'll be able to see you subsequently in the series we plan. Thank you.

(Applause.)

(8:54 a.m.)